Hardware Model of IDMT Protection Scheme Using Numerical Relay

Pankaj B Thote; Mohammad Ashar; Afsar Khan; Chandrakant Rathore

Pankaj B Thote Department of Electrical Engineering S.B. Jain Institute of Technology Management and Research, Nagpur, Maharashtra, India
Mohammad Ashar Department of Electrical Engineering S.B. Jain Institute of Technology Management and Research, Nagpur, Maharashtra, India
Afsar Khan Department of Electrical Engineering S.B. Jain Institute of Technology Management and Research, Nagpur, Maharashtra, India
Chandrakant Rathore Department of Electrical Engineering S.B. Jain Institute of Technology Management and Research, Nagpur, Maharashtra, India

Keywords: Abnormal, fault, Inverse definite minimum time, Microcontroller, Overcurrent.

Abstract

Protection plays a crucial role in power system engineering, especially current protection. Hence, the authors have modelled and simulated various operating characteristics of overcurrent relay in MATrix LABoratory (MATLAB)/Simulink environment in this paper. The proposed work has been divided in two phases. In the first part, modeling of Inverse Definite Minimum Time (IDMT) overcurrent relay on MATLAB/Simulink platform has been done, and the simulation has been carried out. The second part IDMT type overcurrent relay has been implemented on AVR microcontroller with intelligent current sensing techniques and control for validation of the simulation results. Different types of faults and different IDMT fault characteristics on the developed model have been tested. The results obtained with the hardware model and Simulink model are compared, and it is noted that both results are in line with each other.

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